Versatile UAV hardware platform for accelerating indoor aerial navigation research
| dc.contributor.author | Deliparaschos, Kyriakos M. | |
| dc.contributor.author | Huang, Xuefei | |
| dc.contributor.author | Neofytou, Michalis | |
| dc.contributor.author | Loizou, Savvas G. | |
| dc.contributor.author | Zolotas, Argyrios | |
| dc.date.accessioned | 2026-05-20T12:22:11Z | |
| dc.date.available | 2026-05-20T12:22:11Z | |
| dc.date.freetoread | 2026-05-20 | |
| dc.date.issued | 2026-12-31 | |
| dc.date.pubOnline | 2026-03-25 | |
| dc.description.abstract | This study presents a bespoke hardware platform for indoor navigation, featuring a quadrotor equipped with an FZ3 card incorporating the AMD (formerly Xilinx) Zynq UltraScale+ ZU3EG MPSoC as the onboard computer. A core component of this platform is a field programmable gate array (FPGA) module specifically designed to efficiently compute Delaunay triangulations, enabling enhanced spatial awareness and real-time surface reconstruction. The onboard computer communicates with the flight controller, inertial measurement unit (IMU), ultra-wideband (UWB) localisation system, stereo camera, light detection and ranging (LiDAR) and ultrasonic sensors via robotic operating system (ROS) 2. The primary objective is to develop a cost-effective, modular unmanned aerial vehicle (UAV) system that can be adapted for a range of indoor navigation applications. The modular design supports different onboard computer platforms and sensor configurations, allowing researchers to easily customise the system for various experiments. By providing a practical framework for precise indoor navigation, this platform addresses the limitations of simulated, simplified laboratory setups, accelerating prototyping and supporting the deployment of UAVs in complex real-world environments. This work explores the UAV’s hardware architecture, the implementation of the Delaunay triangulation core on the FPGA system-on-chip (SoC), the ROS 2-based communication system and includes a detailed mass analysis and power estimation. | |
| dc.description.journalName | The Aeronautical Journal | |
| dc.format.extent | pp. xx-xx | |
| dc.identifier.citation | Deliparaschos KM, Huang X, Neofytou M, et al., (2026) Versatile UAV hardware platform for accelerating indoor aerial navigation research. The Aeronautical Journal, Available online 25 March 2026 | en_UK |
| dc.identifier.eissn | 2059-6464 | |
| dc.identifier.elementsID | 870123 | |
| dc.identifier.issn | 0001-9240 | |
| dc.identifier.uri | https://doi.org/10.1017/aer.2026.10143 | |
| dc.identifier.uri | https://dspace.lib.cranfield.ac.uk/handle/1826/25244 | |
| dc.language | English | |
| dc.language.iso | en | |
| dc.publisher | Cambridge University Press (CUP) | en_UK |
| dc.publisher.uri | https://www.cambridge.org/core/journals/aeronautical-journal/article/versatile-uav-hardware-platform-for-accelerating-indoor-aerial-navigation-research/AD6B797810C5E4B7509CA4B1C5FFCE60 | |
| dc.rights | Attribution 4.0 International | en |
| dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | |
| dc.subject | UAS testbeds | en_UK |
| dc.subject | navigation | en_UK |
| dc.subject | FPGA SoC | en_UK |
| dc.subject | high-level synthesis | en_UK |
| dc.subject | Delaunay triangulation | en_UK |
| dc.subject | ROS 2 | en_UK |
| dc.subject | 40 Engineering | en_UK |
| dc.subject | 4009 Electronics, Sensors and Digital Hardware | en_UK |
| dc.subject | 7 Affordable and Clean Energy | en_UK |
| dc.subject | Aerospace & Aeronautics | en_UK |
| dc.subject | 35 Commerce, management, tourism and services | en_UK |
| dc.title | Versatile UAV hardware platform for accelerating indoor aerial navigation research | en_UK |
| dc.type | Article | |
| dc.type.subtype | Journal Article | |
| dcterms.dateAccepted | 2026-01-22 |
